The Cranky Sysadmin A world of technology, fun, and ignorant rants.

July 20, 2013

In Search of FPGAs or Pano Logic Generation 1 Teardown

Filed under: digital logic,Electronics,Pano Logic — Cranky Sysadmin @ 7:44 pm

In my general search for fpga’s and devices I might use for SDR projects, I came across a hackaday article on the topic. The comments on the topic are promising, so I went ahead and started looking for a Pano Logic Zero Client. I didn’t just find one. I found ten for $50 on ebay! These are the generation 1 version. It turns out that this is probably a better choice for me anyway. The generation 2 has an enormous Spartan-6 LX150 which is nice, but ISE webpack isn’t licensed to program it. The gen 1 has a Spartan 3E XC3S1600E. This is still a large (by my standards) fpga and the webpack license will program it fine. See below the fold for a teardown and some details.

The first step when I received the package was to scurry to the basement and break out the tools. These devices are a 3″x3″x2″ box. Here it is still mostly assembled.

IMG_0078There are four screws and the nuts on the vga connector to remove so that the blue metal plate can be removed. The no-skid rubber insert can be removed after the plate.

IMG_0079That’s a nice little speaker. I think I’ll keep that. The board with the VGA connector has 3 screws to remove.

IMG_0080and the bottom board also has 3 screws.

IMG_0081Below is a picture of the VGA daughter card. There is no controller on this card. All of the parts seem to be for conditioning the signals.

IMG_0083I was hoping that the controller was on the daughter card so that I would have some free IO pins directly from the FPGA, but no such luck. Below is are pictures of the left and right half of the main board.

IMG_0084IMG_0085Some of the chip part numbers don’t show up well in these pictures. Don’t worry. I will enumerate them below. Here is a nice picture of the back of the board.

IMG_0086I thought I was going to have to sacrifice one of the boards so that I could get to the BGA pins for continuity checks. If you look closely though, you will see vias for each BGA pin. Woohoo! I used those vias to pin out the jtag connector.

For those who want to get straight to attaching a jtag connector, here are some details:

J8 is labeled jtag and its pins are (from left to right):

  1. vcc
  2. tdi
  3. tms
  4. tdo
  5. tck
  6. gnd

J6 is labeled “Short to program”. J7 is labeled SPI. I’ll bet that is used to debug other chips on the board or maybe to program the SPI flash. Below is a list of all the IC part numbers I could find on the board.

main card
u1 63 1
u2 (wolfson) WM8750BG 8CAC4GV (near mic)
u3 LFEB
u4 MICREL KSZ8721BL 0751A4Q (near ethernet)
u5 “TXC BCr1C” 100.000 (pll)
u6 ICS307M-02LF (0 might be Q) 8724551
u7 1BCX 6TA2l (l might be 1 or I) (flash mem?)
u8 XCS3S1600E FGG320DGQ0833 (FPGA)
u9 NXP ISP1760BE “SI9522.1 28” ZSD0819B
u10 25P80G “7B2C4 V5” (SPI flash)
u11 TI THS8135 88T AYD9
u12 TI L339 91KG4 (G4 underlined) AKEK
u13 T11G
u14 7S08B
u24 S5B
u27 SMSC USB2513AEZG C0825-A2F15
u28 AAS 1AW + (1 might be L or I)
u29 AAS 1AW + (1 might be L or I)

daughter card
u15 scfb
u16 sktb
u17 sktb
u18 scjb
u19 7Z25B
u20 7Z25B
u21 63 1
u22 63 1
u23 63 1
u25 63 1

As I dig into this nifty device, I’ll add some links to data sheets, but if you’re interested in getting your own, this should get you started (update 2013-07-20 some data sheet links added).

Eventually, I would like to find a few free I/O’s and set up an sdr with a nice LCD and rotary encoder. We’ll see if I can get that far.

2 Comments »

  1. Tanner Electronics in Carrollton, Texas has about 20 or 30 of the DVI versions of the cubes for $9.95 each.

    Comment by Stonent — December 27, 2014 @ 12:52 am

  2. Can You buy from Tanner Electronics, 3 x Pano’s with DVI for me and send to Europe? :)

    Comment by Sort — February 6, 2015 @ 1:40 pm

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